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Home»Interviews»Synopsys Accelerates AI and Multi-Die Design Innovation on Superior Samsung Foundry Processes
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Synopsys Accelerates AI and Multi-Die Design Innovation on Superior Samsung Foundry Processes

Editorial TeamBy Editorial TeamJune 17, 2025Updated:June 17, 2025No Comments4 Mins Read
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Synopsys Accelerates AI and Multi-Die Design Innovation on Superior Samsung Foundry Processes
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Synopsys, introduced at present its ongoing shut collaboration with Samsung Foundry to energy the following technology of designs for superior edge AI, HPC, and AI functions. The collaboration between the businesses helps mutual clients obtain profitable tape-outs of their advanced designs utilizing Synopsys’ 3DIC Compiler and Samsung’s superior packaging applied sciences with quick turnaround time. Mutual clients can enhance energy, efficiency and space (PPA) with licensed EDA flows for SF2P course of, and reduce IP integration danger with the high-quality portfolio of IP on Samsung’s most superior course of applied sciences.

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“The adoption of Edge AI functions is driving the necessity for developments in semiconductor applied sciences to allow advanced computational duties, enhance effectivity, and develop AI capabilities throughout varied industries and functions,” mentioned John Koeter, senior vp for the Synopsys IP Group. “Along with Samsung Foundry, we’re enabling probably the most superior AI processors throughout a broad spectrum of use circumstances from high-performance AI inference engines for knowledge facilities to ultra-efficient Edge AI gadgets like cameras and drones, all optimized for growth on sub-2nm Samsung Foundry course of applied sciences.”

“Synopsys and Samsung have deepened their collaboration to optimize PPA for designs utilizing Samsung’s superior applied sciences,” mentioned Hyung-Ock Kim, vp and head of the Foundry Design Know-how Workforce at Samsung Electronics “With Synopsys’ AI-driven design flows licensed for Samsung’s SF2 and SF2P processes, clients can seamlessly combine these options into their workflows. This collaboration additionally offers entry to Synopsys’ broad portfolio of IP optimized for Samsung’s superior nodes. Moreover, our joint efforts in delivering multi-die options, together with 2.5D automated routing with Synopsys’ 3DIC Compiler and Samsung’s I-CubeS™ know-how, are pushing the boundaries of innovation on this area.”

Profitable Collaboration on Multi Die Design
Synopsys and Samsung are powering probably the most advanced multi-die designs to allow mutual clients to quickly ship superior applied sciences to the market. The businesses’ most up-to-date collaboration features a profitable tape-out of a buyer design utilizing Synopsys’ 3DIC Compiler, a unified exploration-to-signoff platform, and Samsung’s I-CubeS 2.5D packaging know-how, which permits a number of HBM stacked dies on a silicon interposer. Along with considerably lowering HBM routing time to 4 hours, the Synopsys 3DIC Compiler improved worst-case eye opening by 6% for higher efficiency and reliability. The continuing initiatives leverage 3DIC Compiler’s speedy 3D floorplanning with bump and By means of-silicon through (TSV) planning and early thermal evaluation, which is licensed by Samsung for Samsung’s X-Dice know-how.

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Collaboration on Design Know-how Co-Optimization and EDA Flows
Synopsys and Samsung Foundry have had a decades-long collaboration utilizing AI-driven design know-how co-optimization (DTCO) to realize superior PPA entitlement on SF2 and SF2P processes. Synopsys and Samsung additionally proceed to collaborate on AI-driven flows utilizing Synopsys ASO.ai™, leading to a brand new schematic migration stream to effectively migrate Samsung SF4 analog IPs to the SF2 course of.

As well as, Synopsys’ AI-driven digital and analog flows have achieved certification on Samsung Foundry’s SF2P course of with hypercells enablement for extra environment friendly use of normal cell area, bettering general PPA, together with licensed digital and analog flows for SF2/SF2P technology nodes. The flows, powered by the Synopsys.ai™ full-stack EDA suite, permit mutual clients to speed up growth of differentiated SoCs on Samsung’s superior course of applied sciences.

Broad Portfolio of Synopsys IP for Samsung Foundry Speeds Time to Market
Synopsys and Samsung Foundry proceed a strategic relationship to supply chipmakers with a complete portfolio of high-quality IP optimized for efficiency, energy, space, and latency throughout Samsung’s superior course of nodes, from 14LPP/U, 8LPU, SF5A to the most recent SF4X and SF2P/A. This collaboration helps a variety of functions, together with high-performance computing, client electronics, cell gadgets, IoT, and automotive markets. Synopsys presents a broad portfolio of interface IP – resembling and 224G, UCIe, PCIe 7.0, MIPI, LPDDR6X and USB4 – alongside basis IP, together with embedded reminiscences, logic libraries, GPIOs, and PVT sensors, in addition to safety IP and Silicon Lifecycle Administration (SLM) IP. By delivering trusted, low-risk options tailor-made to Samsung’s processes, Synopsys allows mutual clients to speed up time-to-market and achieve a aggressive edge for his or her superior designs.

[To share your insights with us, please write to psen@itechseries.com]



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